1/9 february 2001 STD1HNC60 n-channel 600v - 4 w - 2a - ipak/dpak powermesh ? ii mosfet n typical r ds (on) = 4 w n extremely high dv/dt capability n 100% avalanche tested n new high voltage benchmark n gate charge minimized description the powermesh ? ii is the evolution of the first generation of mesh overlay ? . the layout re- finements introduced greatly improve the ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness. applications n high current, high speed switching n swith mode power supplies (smps) n dc-ac converters for welding equipment and uninterruptible power supplies and motor driver absolute maximum ratings ( ? )pulse width limited by safe operating area . type v dss r ds(on) i d STD1HNC60 600 v < 5 w 2a symbol parameter value unit v ds drain-source voltage (v gs = 0) 600 v v dgr drain-gate voltage (r gs =20k w ) 600 v v gs gate- source voltage 30 v i d drain current (continuos) at t c =25 c 2a i d drain current (continuos) at t c = 100 c 1.3 a i dm (1) drain current (pulsed) 8 a p tot total dissipation at t c =25 c50w derating factor 0.4 w/ c dv/dt peak diode recovery voltage slope 3.5 v/ns t stg storage temperature 65 to 150 c t j max. operating junction temperature 150 c (1)i sd 2a, di/dt 100a/ m s, v dd v (br)dss ,t j t jmax ipak 3 2 1 1 3 dpak to-251 to-252 internal schematic diagram
STD1HNC60 2/9 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 2.5 c/w rthj-amb thermal resistance junction-ambient max 100 c/w rthj-sink thermal resistance case-sink typ 1.5 c/w t l maximum lead temperature for soldering purpose 275 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 2a e as single pulse avalanche energy (starting t j =25 c, i d =i ar ,v dd =50v) 120 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a, v gs = 0 600 v i dss zero gate voltage drain current (v gs =0) v ds = max rating 1 m a v ds = max rating, t c = 125 c 50 m a i gss gate-body leakage current (v ds =0) v gs = 30v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs ,i d = 250 m a 234v r ds(on) static drain-source on resistance v gs = 10v, i d =1a 45 w i d(on) on state drain current v ds >i d(on) xr ds(on)max, v gs =10v 2a symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds >i d(on) xr ds(on)max, i d =1a 2s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 228 pf c oss output capacitance 40 pf c rss reverse transfer capacitance 6pf
3/9 STD1HNC60 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 m s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 300v, i d =1a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 9 8.5 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 480v, i d =2a, v gs = 10v 11.3 2.8 5 15.5 nc nc nc symbol parameter test condit ions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 480v, i d =2a, r g =4.7 w, v gs = 10v (see test circuit, figure 5) 18 9 27 ns ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 2 a i sdm (2) source-drain current (pulsed) 8 a v sd (1) forward on voltage i sd = 2 a, v gs =0 1.6 v t rr reverse recovery time i sd = 2a, di/dt = 100a/ m s, v dd = 100v, tj = 150 c (see test circuit, figure 5) 480 ns q rr reverse recovery charge 1032 nc i rrm reverse recovery current 4.3 a safe operating area thermal impedence
STD1HNC60 4/9 gate charge vs gate-source voltage transconductance static drain-source on resistance transfer characteristics output characteristics capacitance variations
5/9 STD1HNC60 normalized on resistance vs temperature normalized gate threshold voltage vs temperature source-drain diode forward characteristics
STD1HNC60 6/9 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/9 STD1HNC60 dim. mm inch min. typ. max. min. typ. max. a 2.20 2.40 0.087 0.094 a1 0.90 1.10 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.90 0.025 0.035 b2 5.20 5.40 0.204 0.213 c 0.45 0.60 0.018 0.024 c2 0.48 0.60 0.019 0.024 d 6.00 6.20 0.236 0.244 e 6.40 6.60 0.252 0.260 g 4.40 4.60 0.173 0.181 h 9.35 10.10 0.368 0.398 l2 0.8 0.031 l4 0.60 1.00 0.024 0.039 v2 0 o 8 o 0 o 0 o p032p_b to-252 (dpak) mechanical data
STD1HNC60 8/9 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 13 == b3 b b6 b2 e g == == b5 2 to-251 (ipak) mechanical data 0068771-e
9/9 STD1HNC60 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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